Per-tensor ranges were checked individually but gaps, overlaps, a
non-zero first offset, and trailing bytes were still accepted. Sort
ranges by start and require the data region to be fully and
contiguously covered, matching safetensors' own validation on the
mmap path. Adds corruption tests for a gap, an overlap, and trailing
bytes.
Address CodeRabbit review on the --disable-mmap fix: reject headers over
the safetensors size limit and tensor data ranges that don't match their
declared shape/dtype (previously a corrupt header with start==end for a
non-empty shape produced an uninitialized tensor instead of an error),
and read each tensor directly into a single bytearray via readinto()
instead of read() + bytearray() copy to halve peak host memory use for
large files.
load_torch_file only wrapped the tensor returned by
safetensors.safe_open()/get_tensor() in a copy when --disable-mmap was
set; the mmap-backed read that produces that tensor had already
happened by then. On Windows that mmap-backed read of large
safetensors files can crash the long-running ComfyUI process with an
access violation (#15424). --disable-mmap now reads tensors with plain
file I/O so no mmap of the file is created at all.
Comfy-aimdo 0.4.12 increases error logging reliablity to help root
cause os errors in some of the C APIs that are causing issues for
some users.
The log is also unified with python logging, so non-terminal users
see the logs properly.
Aimdo 0.4.13 fixes a bug in async-offload + MRU primary weights
allocation. https://github.com/Comfy-Org/ComfyUI/issues/15284
This avoids name collision (circular imports) for external custom nodes,
for which the comfy path is pushed into sys.path so Python's own logging module
is shadowed otherwise.
fixes: #15229
This priority scheme was broken in the case where you have pin
registration exhaustion while loading a VBAR that gets a big evicition.
The weight would stay in the loaded set but inherit the MRU priority
against other workflow models WRT pin registration which leads to async
offload without pinning.
Fix by universally promiting active pin registration above workflow
pins without concern for the weights/weights-loaded split. This diverges
from the actual budgeting where the split still makes sense.
Changes:
Remove sequential scan hint
Prefer NVML pressure on windows
Add async malloc clamp option (unused by comfy so far)
Workaround AMD windows GPU virtual address space leak
The largest change is the NVML pressure, which works around a cuMemGetInfo
drift from actual VRAM in some circumstances.